Self-driving cars, Artificial Intelligence, cloud, 5G, The Internet of Things
These breakthroughs are ushering in the era of Smart Everything
Synopsys powers it all with the worlds most advanced technologies for chip design and software security
If you have a passion for innovation, we want to meet you
Our Electronic Design Automation Group supplies tools to create and verify IC designs
Leading-edge customers use these tools on their most challenging designs
Formality is one of these tools and offers next-generation equivalence checking technology
As a member of the Formality R&D team, you will work with other enthusiastic and creative engineers
You will contribute to a growing tool where you can expand your knowledge and skills
Things you'll learn include formal verification strategies, distributed computing, machine learning, and more
Formality gives you the unique opportunity to work with customers all over the world, across different fields (Computing, AI, Automotive, Mobile)
You will help deliver sign-off quality solutions that will enable customers to deliver their next big innovation
We are seeking an experienced, highly motivated, and high-caliber individual to provide technical leadership in the development of design flows, tool development and support for Formality
The candidate will actively help in technical mentoring, enhance algorithms, learn engines, create prototypes etc, Device new solutions using formal or AI/ML technologies
Become a technical anchor for rest of the R&D team
You will be responsible for:
Architect/Design innovative solutions to deliver step improvements to verification runtime/memory and to research and develop formal solutions to support the state-of-the-art synthesis optimizations
Learning, analyzing, testing, and debugging the Formality code base
Interacting with Synopsys R&D, customer support, and sales experts
The goal: understand customer needs and product directions
Delivering high-quality software on schedule
Required skills:
BS/BE in Electrical and/or Computer Engineering with at least 12 years of relevant industry experience
Software development experience with C or C++
Broad understanding of data structures, algorithms, heuristics, and their applications
Experience with complex software development in a legacy code base
Comfortable with learning and applying new technologies
Ability to work in both independent and collaborative settings
Good written and oral communication skills
Preferred skills:
PhD or MS/ME in a related field (EE/CS/Math/Physics) with at least 10 years job-related experience
Experience in formal verification and/or synthesis techniques
Knowledge of software specification and design process, and regression testing
Knowledge of solver algorithms such as SAT or BDD
Knowledge of Distributed processing, machine learning techniques, big data
Strong experience in the fields of design, methodology and EDA solutions for leading edge digital SOC chip designs
Experience in Formal methods, and equivalence concepts is a strong plus
Experience with Verilog, VHDL, System Verilog
NA
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