Description :- Semifront Technologies, Kolkata, is looking for folks passionate and dedicated individuals who can code RTL from scratch with engineering supervision and broad-level Microarchitecture and Architecture Specs.
Skills and other requirements:-
The person should have excellent Verilog/SystemVerilog/Perl Skillset the coding will be Perl mixed Verilog/SV.
Knowledge of Make, Python, Bash is an advantage.
The person needs to have a good understanding of the basic building blocks of an ASIC/FPGA design.
The person should have gone through one or more rounds of entire chip-design cycle and have done hands-on design of a complete block and have interacted with verification, PD, DFT, PNR, FPGA, post-silicon etc team across the chip.
Having owned a decent to fairly complex block from scratch is an added advantage.
Understanding of advanced concepts (as coherency, ordering etc) is an advantage, but not mandatory.
The person should have good energy to finish work in a timely manner, passion for coding, attention to detail and humility to learn from the right feedback.
The person should be a great team player.
For very senior persons (10+ years) , prior experience of delivery a complex design with a decent sized team is very desirable.
Qualification :-
BE/BTech or ME/MTech with a major in EC/EE/CS with 5+ to 10+ years of experience in RTL design.
Benefits :-
Opportunity to work in complex ASIC product design from scratch.
Opportunity to work in complex protocols such as PCI Express from scratch.
Opportunity to learn alongside experienced and passionate engineers who have helped build IPs/SoCs from scratch.
Opportunity to mentor and lead a team of junior engineer who are themselves highly motivated, passionate and are from premier institutes.
Monthly stipend/remuneration and performance based bonuses.
Facility to work partially remotely for excellent individuals.
